The invention relates to a data processing system with configurable components.
In data processing systems, for example in computer systems, it is usually necessary to configure configurable components whenever the computer system is first booted up. This booting up when computer systems are switched on usually lasts for a relatively long time, often for several minutes. Reasons for this are, for example, the complex configuration of complex systems, for example a system bus, a memory bus, hard disks, hard-disk controllers, and the like.
The configuration data of configurable components are usually stored in configuration registers of the respective components during the booting up operation.
In particular in mobile data processing systems, for example in what are referred to as Internet appliances, such a complex and long-lasting initiation process of the system is particularly undesirable.
It has already been known to write configuration data from configuration registers of configurable components into a nonvolatile memory when shutting down a data processing system, and to write the configuration data from the non-volatile memory back into the corresponding registers of the configurable components when the system is switched on again and booted up. This is referred to, for example, as a xe2x80x9csuspend to/from diskxe2x80x9d, and in this context the non-volatile memory is a hard-disk memory of the system. The exchange of data between configuration registers and the non-volatile memory is carried out here via data buses of the data processing system, for example a system bus, a memory bus, etc. These data buses are normally parallel high-speed bus systems which, to operate satisfactorily, already require correct configuration of the components involved, for example the hard-disk controllers, hard disk, system bus, and memory bus. The switching-off and switching-on operations which are shortened in this way for data processing systems are consequently still relatively long-lasting.
A circuit configuration having configurable host adapter cards is disclosed in U.S. Pat. No. 5,881,281. There, configuration data for configuring the host adapter can be read in serially after the system is reset.
FIG. 1 shows a data processing system having configurable components C1, C2, C3 according to the prior art. The configurable components C1, C2, C3 each have a configuration register REG1, REG2, REG3 wherein configuration data of the associated configurable components C1, C2, C3 can be stored. Each component C1, C2, C3 is connected to its respective configuration register REG1, REG2, REG3 via a high-speed bus system BUS1, which is embodied as a parallel bus system, via one interface BUS-IF in each case.
In what is referred to as the boundary scan method, test data inputs and outputs of integrated circuits are connected to one another in a shift register chain in order to enable self-tests of these integrated circuits to be carried out.
It is accordingly an object of the invention to provide a data processing system with configurable components, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and wherein shorter time periods are required to boot up and shut down the system.
With the foregoing and other objects in view there is provided, in accordance with the invention, a data processing system having configurable components, comprising:
a plurality of configuration registers for storing configuration data for configuring the configurable components, the configuration registers each having an input and an output;
a non-volatile memory;
a serial bus connecting the configuration registers to the non-volatile memory and enabling a serial transmission of data from the configuration registers to the non-volatile memory and from the non-volatile memory to the configuration registers;
a plurality of shift registers each having a serial input and a serial output and each being connected to a respective the configuration register for transmitting configuration data, and the shift registers being coupled via the serial inputs and the serial outputs to the serial bus to form a shift register chain.
In other words, the objects of the invention are satisfied with a data processing system having configurable components and having:
a plurality of configuration registers wherein configuration data for configuring the components can be stored and which have inputs and outputs; and
a serial bus which couples the configuration registers to a non-volatile memory in such a way that a serial transmission of data both from the configuration registers to the non-volatile memory and from the nonvolatile memory to the configuration registers is made possible, the configuration registers being coupled to one shift register each for the purpose of transmitting configuration data, and the shift registers having serial inputs and outputs via which the shift registers are connected to the serial bus to form a shift register chain.
The data processing system having configurable components is based here on the principle of introducing a serial bus via which the configuration registers can be read out and the data written into the non-volatile memory when the system is shut down, for example, and conversely the data can be written back into the respective configuration registers from the nonvolatile memory via the serial bus when the system is booted up, for example. During the booting up and shutting down operations, the configuration process which can be carried out very quickly is thus possible because, for this to be carried out, it is no longer necessary for a high-speed bus, whose configuration is itself costly, to be already available. Instead, the serial bus, and thus the high-speed booting up of the system, function even without a high-speed bus or other complex bus systems. High-speed booting up and shutting down of the system has advantages, in particular in mobile systems.
Accordingly, the serial bus is used to write configuration data stored in the non-volatile memory directly into all the configuration registers which are necessary for initializing and operating various components of the system.
In accordance with the present invention, the configuration registers for transmitting configuration data are also coupled to one shift register each, the shift registers having serial inputs and outputs via which the shift registers are connected to the serial bus to form a shift register chain.
In accordance with a preferable feature of the invention, the serial bus has a bus width of 1 bit.
The serial transmission of data between a non-volatile memory and the configuration registers using the serial bus can be a bit-serial transmission of data.
When the data processing system is started or booted up for the first time, it is necessary to carry out a relatively time-consuming configuration process. However, during all the further booting up and shutting down operations of the system it is possible for the states of the configuration registers, that is to say the configuration data which represent the current configuration of the respective system component, to be read out via the serial bus and stored in the non-volatile memory. The sequencing control of these writing and reading operations can be controlled, for example, with the operating system or the BIOS (Basic Input/Output System) of the system.
If the configuration of the system happens to change, for example as a result of expansions of the hardware, that is to say by adding further components to the system, it may be necessary to allow a conventional, costly configuration process to run when the system is first booted up after its expansion. During the next shutting down operation, the acquired configuration data can in turn be transmitted via the serial bus into the non-volatile memory and stored there. During the next system start, and all further system starts, it is then possible to achieve high-speed booting up by transmitting the configuration data from the non-volatile memory into the configuration registers of the respective components.
With the described system, the time period during which the system boots up and during which it is already consuming power, but cannot yet be used, is therefore significantly shortened.
The configuration register can be the same as the shift register here. Alternatively, it is possible, for example, to connect a shift register within a component to a plurality of configuration registers of the component. Shift registers can be implemented in a particularly simple way, for example with a chain of flip-flops, which permit information applied to an input of the shift register, configuration data in this case, to be shifted onward by one flip-flop at each clock pulse.
In accordance with an advantageous feature of the invention, the shift registers form a ring with the serial bus and the non-volatile memory. Such a ring-shaped shift register chain can, for example, be operated during the booting up of the system in such a way that the configuration data is shifted from the non-volatile memory into the respective correct shift register of the respective component, for example clocked with a clock signal and, for example, bit-by-bit. When the system is shut down, the configuration data can be read out of the shift registers serially and written into the non-volatile memory by means of the serial bus.
The shift registers can each have a data input, a data output and a clock signal input here. The shift registers of the individual components are connected one behind the other, or in series, here in such a way that in each case an output is connected to the input of a shift register of another component. The input of a first shift register is connected to an output of the non-volatile memory, and the output of a last shift register in the shift register chain is connected to the input of a non-volatile memory.
In accordance with a further, advantageous embodiment of the present invention, the shift registers are configured for forward and backward shifting. Accordingly, a ring structure is not formed in the shift register chain, rather the shift registers can either be connected serially or in parallel by their input/output interfaces to an input and output of the non-volatile memory.
In a further, advantageous embodiment of the present invention, the shift registers have an interface for the parallel inputting and outputting of data, via which interface they are connected to the configuration registers. If the shift registers are not the same as the configuration registers, the configuration data can be transmitted in parallel from the already loaded shift registers into the configuration registers when the system is booted up. Conversely, when the system is shutdown, the configuration data can be transmitted in parallel from the configuration registers into the respectively assigned shift registers. The configuration data which is then stored in the shift registers can subsequently be transmitted serially from the shift registers into the non-volatile memory by means of the serial bus.
In accordance with another feature of the invention, the shift registers each have a clock input to which a clock signal can be fed. The clock signal inputs of the shift registers can be connected to one another here. The non-volatile memory can also have a clock input which can be driven with the clock signal which can be fed to the shift registers. The sequence of the serial transmission of data can be controlled using the clock signal. In doing so, the configuration data can be shifted from one flip-flop in the shift register chain to the next at each clock pulse. The protection and backing up of the configuration data can be controlled, for example by an operating system or the BIOS of a computer system, using the clock signal.
In accordance with a further, advantageous embodiment, the non-volatile memory is a magnetic disk memory. Magnetic disk memories, for example hard disks, are usually present in computer systems in any case.
In accordance with again a further, advantageous embodiment of the present invention, the non-volatile memory is a volatile memory which is supplied from an additional voltage source.
The additional voltage source may be, for example, a battery or a capacitor with a very long storage time.
The non-volatile memory can in this case be advantageously embodied as a register which has the same number of serially arranged memory locations as results from the product of the number of shift registers and number of memory locations of the shift registers.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a data processing system having configurable components, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.